🚚 Free Worldwide Shipping on All Orders!Shop Now
G338S - 74LS125 SMD Quad 3-STATE Buffer
This device contains four independent gates each of which performs a non-inverting buffer function. The outputs have the 3-STATE feature. When enabled, the outputs exhibit the low impedance characteristics of a standard LS output with additional drive capability to permit the driving of bus lines without external resistors. When disabled, both the output transistors are turned off presenting a high-impedance state to the bus line. Thus the output will act neither as a significant load nor as a driver. To minimize the possibility that two outputs will attempt to take a common bus to opposite logic levels, the disable time is shorter than the enable time of the outputs.
SOIC 14 package. Actual brand may vary from picture.
G338S
SOIC 14 package. Actual brand may vary from picture.
G338S
This device contains four independent gates each of which performs a non-inverting buffer function. The outputs have the 3-STATE feature. When enabled, the outputs exhibit the low impedance characteristics of a standard LS output with additional drive capability to permit the driving of bus lines without external resistors. When disabled, both the output transistors are turned off presenting a high-impedance state to the bus line. Thus the output will act neither as a significant load nor as a driver. To minimize the possibility that two outputs will attempt to take a common bus to opposite logic levels, the disable time is shorter than the enable time of the outputs.
SOIC 14 package. Actual brand may vary from picture.
G338S
SOIC 14 package. Actual brand may vary from picture.
G338S
$0.15
Original: $0.42
-64%G338S - 74LS125 SMD Quad 3-STATE Buffer—
$0.42
$0.15Description
This device contains four independent gates each of which performs a non-inverting buffer function. The outputs have the 3-STATE feature. When enabled, the outputs exhibit the low impedance characteristics of a standard LS output with additional drive capability to permit the driving of bus lines without external resistors. When disabled, both the output transistors are turned off presenting a high-impedance state to the bus line. Thus the output will act neither as a significant load nor as a driver. To minimize the possibility that two outputs will attempt to take a common bus to opposite logic levels, the disable time is shorter than the enable time of the outputs.
SOIC 14 package. Actual brand may vary from picture.
G338S
SOIC 14 package. Actual brand may vary from picture.
G338S
