This octal buffer/line driver is operational at 1.5-V to 3.6-V VCC, but is designed specifically for 1.65-V to 3.6-V VCC operation. The SN74LVC244APWR is organized as two 4-bit line drivers with separate output-enable (OE) inputs. When OE is low, the device passes data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state. Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in a mixed 3.3-V/5-V system environment. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

Features:
Operates From 1.65 V to 3.6 V
Inputs Accept Voltages to 5.5 V
Specified From -40?C to 85?C and -40?C to 125?C
Max tpd of 5.9 ns at 3.3 V
Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25?C
Typical VOHV (Output VOH Undershoot) > 2 V at VCC = 3.3 V, TA = 25?C
Supports Mixed-Mode Signal Operation on All Ports (5-V Input/Output Voltage With 3.3-V VCC)
Ioff Supports Partial-Power-Down Mode Operation
Latch-Up Performance Exceeds 250 mA Per JESD 17

Datasheet Available:Texas Instruments SN74LVC244APWR

TSSOP 20 package. Manufactured by Texas Instruments.
A20271S